Candidate is expected to have expertise in either Cadence, virtuoso, spectre, Mentor Calibre flows and should be capable of executing block or full chip level tasks independently;Candidate should be technically…Read more →

Expert in all type of pattern generation (Stuck-At, At-Speed, Path Delay, Burn-In, IDDQ patterns) and corresponding changes required to implement them while DFT insertion;Candidate is expected to work…Read more →

Experience in basic RTL simulation;Good knowledge of Synthesis, STA and DFT aware designRead more →

Experience in Digital module micro-architecture and design;Good knowledge of Synthesis, STA and DFT aware design;Experience in basic RTL simulationRead more →

Experience in Digital module architecture & micro-architecture and design;Good knowledge of Synthesis, STA and DFT aware design;Experience in basic RTL simulation;Good knowledge of ARM subsystem,…Read more →

Candidate is expected to have expertise in either Cadence or Synopsys flows and should be capable of executing block or full chip level tasks independently;Well versed with the level timing closure (STA),…Read more →

Digital Verification team is working on IP verification and SoC verification projects for our various tier 1 & tier2 global customers;Candidate should be able to perform IP/SoC functional simulation,…Read more →

Willingness and ability to contribute to process improvement initiatives;Hands on experience in cadence Virtuoso and physical verification tools such as calibre / Hercules;Minimum of 5+ years in Layout…Read more →

Candidate should have customer interface experience for gathering technical requirements;Proficiency in C/C++/Perl/Python/Tcl/SKILL with multi-platform experience;2-10 years of experience in EDA/System…Read more →

Independently execute layout-design of the assigned Analog & Mixed-Signal / RF blocks, which includes floor-planning as per area & top-level, parasitic-aware routing & doing various required…Read more →

Independently execute layout-design of the assigned Analog & Mixed-Signal / RF blocks, which includes floor-planning as per area & top-level, parasitic-aware routing & doing various required…Read more →