1. Memory FE/Verilog models development & verification. 2. Support memory model verification and testbench development. 3. Verilog/RTL Model Development support for SRAMs/TCAM 4. Unit-level verification,…Read more →

At least 2 years of Hands on Experience on characterisation Audio modules and Analog interface;Knowledge and Hands on Experience in audio protocol I2S and interface dependencies;Experience: 4 to 8 Yea…Read more →