Design For Test experience, Scan insertion, ATPG (Test Pattern Generation).
Awareness of MemBIST flow.
Familiarity with ATE, automatic test equipment.
Work experience in deep sub-micron technologies like 45nm and below.
EDA Tools Synopsys, Mentor Graphics (Flextest/fastscan), Atrenta, etc.
Scripting knowledge on perl. SKILL.
Understanding the overall design, preparing a test plan, doing scan insertion,
memory test collar development using tools like MEMBIST, functional pattern generation and verification on design, etc.
Need to be able to discuss with RTL or custom designers and align on test methodology, debug test issues and suggest improvements to test methodology.
Need to be able to train and groom a set of junior engineers in the area of DFT.
Salary: Not Disclosed by Recruiter
Industry: Semiconductors / Electronics
Functional Area: Engineering Design, R&D
Role Category: Engineering Design
Role: Design Engineer
Employment Type: Permanent Job, Full Time