(1-2 out of 2)
Dft Engineer 04 Jan

3 - 8 yrs. Bengaluru

Design For Test experience, Scan insertion, ATPG (Test Pattern Generation). Awareness of MemBIST fl...view more

ASIC RTL Design Engineer 04 Jan

4 - 9 yrs. Bengaluru

Skill Requirements: Hands-on in Verilog/VHDL Hands-on in Perl/Unix scripting Hands on in S...view more

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